This command will be used to perform power validation.
BUG=none
BRANCH=none
TEST=ectool extpwrlimit command can be used to set the max voltage/current
drawn from external charger.
Change-Id: Ic258954c1e3a714be7f648e77234dab594227ce0
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/388843
Reviewed-by: Shawn N <shawnn@chromium.org>
Added i2ctest console command to test the reliability of the I2C.
By reading/writing to the known registers this tests provides the
number of successful read and writes.
BUG=chrome-os-partner:57487
TEST=Enabled the i2ctest config on Reef and tested the
i2c read/writes.
BRANCH=none
Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/290427
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Except the CHIP_ID and charger name code is common between BD99955
and BD99956. Hence renamed the code to BD9995X so that valid
output is printed from console commands.
BUG=chrome-os-partner:57519
BRANCH=none
TEST=Manually tested on Reef. 'charger' console command prints
charger name as 'bd99956'
Change-Id: I3c995757941bcc5a6a8026dd807d76a7a47c9911
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/387119
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Removed power LED support.
In case of discharging, if below critical level, LED should blink;
otherwise, will show power state;
In case of charging, will show charging/battery state.
BUG=chrome-os-partner:56932,chrome-os-partner:57025
BRANCH=none
TEST=Verified on EVT with <10% and <3% battery, LED is blinking
amber at proper duty cycle.
Also verified ectool led command works as expected.
Change-Id: I903396a9a1dc5e08618683f7124b09678678e233
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/383880
Commit-Ready: Li1 Feng <li1.feng@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
- Enable MKBP events:
Allow EC to send sensor event to the kernel sensor stack.
- Disable APCI message display, to avoid overwhelming the console.
- Set the rotation matrices to match Android requirement.
BUG=b:27849483
CQ-DEPEND=CL:384341
BRANCH=reef
TEST=Check we can receive sensor events for ARC++.
Check the acceleromter axis are correct.
Change-Id: I5fa58e22167f027bd1b84e72f002060d15d882c4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/385082
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
charge_manager may request a charge current limit less than the
capability of the supply in certain cases (eg. during PD voltage
transition, to make an effort to comply with reduced load spec).
Depending on the battery / system state, setting a reduced charge
current limit may result in brownout.
Pass the uncapped / max negotiated current to board_set_charge_limit()
so that boards may use it instead of the requested limit in such
circumstances.
BUG=chrome-os-partner:56139
BRANCH=gru
TEST=Manual on kevin with subsequent commit, boot system with zinger +
low-charge battery, verify devices powers up to OS without brownout.
Change-Id: I2b8e0d44edcf57ffe4ee0fdec1a1ed35c6becbbd
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/383732
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
LID_OPEN gpio is interrupt trigger on both the edge. If the system is
hibernated when LID is open and then LID is closed, system wakes from
hibernation. Hence setting the LID_OPEN GPIO as interrupt raising before
hibernation so that system won't wake up upon LID close in hibernation.
BUG=chrome-os-partner:57221
BRANCH=none
TEST=Issued hibernate when LID is open, closed the LID after hibernation
observed system won't boot back till LID is open again.
Change-Id: Idc89c3d85b7d246c3e18d0ced48e7d47bebeafec
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/383753
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
This makes minor changes to GPIOs for the next build:
- USB_C0_PD_RST_L is actually push-pull in next build, so remove the
comments about USB_C0_PD_RST_ODL.
- Added TABLET_MODE
- Make the net name for volume up/down buttons match the name in the
schematic.
BUG=none
BRANCH=none
TEST=built and booted on Reef EVT
Change-Id: I0799de059d71809174e246b6bbd7f3a2fe25686a
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/381791
Reviewed-by: Shawn N <shawnn@chromium.org>
Data from the sensor (in Pa) does not fit in 16 bits.
Add set_range/get_range to allow the AP to set the precision.
For pressure around ~1000 hPa, we need to right shift by 2 bits.
BUG=chrome-os-partner:57117
BRANCH=reef
TEST=Check data is not truncated anymore:
> accelrange 4
Range for sensor 4: 262144 (Pa ~= 2621 hPa)
> accelread 4
Current data 4: 24030 0 0
Last calib. data 4: 24030 0 0 (x4 = 961.2 hPa)
Change-Id: I3f7280336e5120d903116612c9c830f4150d2ed7
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382323
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
This patch makes a few small changes to gpio.inc:
- Correct NC1 assignment (GPIO00)
- Add ENG_STRAP (GPIOB6) which is currently not connected to anything.
- Cosmetic fix for LEDs (replace spaces with tabs for alignment)
BUG=none
BRANCH=none
TEST=built and booted on Reef
Change-Id: Ieca83be6c7423694d88f21ebfc3f57849bf42cde
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/380449
Tested-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This fixes an issue where the power+charge LED sometimes changes
more than once when power is plugged in.
BUG=chrome-os-partner:56471
BRANCH=none
TEST=Reef power+charger LED changes from one color to another instead
of back and forth (unless there are a lot of PD hard resets, but
that's another matter)
Change-Id: I0ea0dd59cbb7c86b758123fd4e6c8e7b20efa5df
Reviewed-on: https://chromium-review.googlesource.com/378756
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
To support hibernate called from console commands, ectool commands
and key sequence added code to shutdown the AP before hibernating.
BUG=chrome-os-partner:56490
BRANCH=none
TEST=Using console command, ectool command & key sequence verified
both EC and AP are hibernated.
Change-Id: I7708377596d7d4175a44c202ae2385a239ca3d01
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/379157
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Setting the higher limit of input current for BC1.2 & nonstandard
BC1.2 devices than their maximum current rating results in an
anti-collapse. BD99955 does not have a way to do hardware charge
ramp or to detect the anti-collapse for these chargers. Hence added
code to support software charge ramp for BC1.2 & nonstandard BC1.2
so that the input current is set to maximum of the respective
charger.
BUG=chrome-os-partner:54990, chrome-os-partner:55517
BRANCH=none
TEST=Manually tested on Amenia & Reef. BC1.2 & nonstandard BC12
devices can negotiate their respective maximum current rating.
Change-Id: I0033b3662362bd7822ad01cf4360d18caabd5249
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/358106
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
Set the EC_WIRELESS_SWITCH flags in Board file. This signals the
common code to maintain the ON or OFF state of the power rails for
the Wifi/Bluetooth chip when chipset enters suspend state.
BUG=chrome-os-partner:56305
BRANCH=none
TEST=Boot the system with a Bluetooth Mouse paired. Open a Linux
shell and type powerd_dbus_suspend. When the system enters
sleep state, click the mouse. System should wake up.
Change-Id: I261ca03d34bc8a05d3a2aa5fcb777f714fe30572
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/374164
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Add API to switch the Rp pull-up value on CC dynamically at runtime.
This is a preparatory work for boards having a more complex maximum
source current policy (eg 2 ports sharing a common pool of power).
For fusb302, update the voltage thresholds for open/Rd/Ra as they depend
on the Rp (was missing from the previous change).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:56110
TEST=make buildall
Change-Id: Id3c24a31a16217075a398ec21ef58ee07187a882
Reviewed-on: https://chromium-review.googlesource.com/373501
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
when TCPC takes a longer time to update its CC status upon
connection, a legacy C-to-A charger or certain Type-C charger
that presents 5V VBUS by default, TCPM could be mistaken the
charger as a debug accessory.
BUG=chrome-os-partner:55980
BRANCH=none
TEST=Manually tested on Reef. PD, Type-C, BC1.2, non-BC1.2,
DP, HDMI are working on both C-ports.
Change-Id: Ic3b0ecd3d14109239d8c0ff0064476595b7f93a0
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/367950
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Due to what appaers to be a leakage issue, this patch drives the
SYS_RST_ODL (aka PMU_RSTBTN_N) pin low for 1sec while the power
state transitions from S3 to S0.
This is a workaround for a proto board issue that prevents the SoC
from booting.
BUG=chrome-os-partner:53791
BRANCH=none
TEST=SoC boots with CL:347754 applied on proto and EVT boards
Change-Id: I88c3ccf18280acf5dfe3b99f99483dc4e4e27873
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/372044
Reviewed-by: Martin Roth <martinroth@chromium.org>
This changes the ordering of rail/PMIC init slightly so that the
3.3V rail comes up before the PMIC, which follows the ordering
in the PMIC datasheet for cold booting.
The way we did it earlier was to avoid interrupt storms caused by
powering the SoC's GPIO block with SLP signals before powering the
PMIC. However the PMIC ignores the SLP signals when it's first
enabled, so while the suprious interrupts were visible on the scope
it's unlikely that the software was affected. OTOH, as Kevin pointed
out in CL:358913 enabling the PMIC before the 3.3V causes a race
condition whereby the PMIC may fault.
BUG=chrome-os-partner:51323
BRANCH=none
TEST=built and booted on EVT
Signed-off-by: Rachel Nancollas <rachelsn@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Change-Id: I6eb734f0600daa5de0d970ce228cf3e7ec97d01d
Reviewed-on: https://chromium-review.googlesource.com/372344
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
When the charger is detached, the host event would sometimes be
sent before the charge info was updated, resulting in the host
thinking that the charger was still connected.
BUG=chrome-os-partner:55584
BRANCH=none
TEST=Connected charger to kevin 15 times and verified that the
icon was removed in 2-seconds or less.
Change-Id: I1a4e4e0f7cc23010210570fc261da8308d8e8070
Reviewed-on: https://chromium-review.googlesource.com/367809
Commit-Ready: Wonjoon Lee <woojoo.lee@samsung.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
BMP280 driver API is designed to work with motion
sensor task. The sensor sampling parameters are
configured optimally for handheld device in accordance
with BMP280 spec recommendation.
BUG=None
BRANCH=master
TEST=Tested on amenia; with appropriate .odr in board file
test command "accelread 4" returns raw pressure
value in Pa; accelinfo on 4000 shows Pa value.
Change-Id: I3f4c0c33a77dd317aa1425624d3cc7f4ec6b45a1
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/351660
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Since pretty much always, we've declared console commands to take
a "longhelp" argument with detailed explanations of what the
command does. But since almost as long, we've never actually used
that argument for anything - we just silently throw it away in
the macro. There's only one command (usbchargemode) that even
thinks it defines that argument.
We're never going to use this, let's just get rid of it.
BUG=none
BRANCH=none
CQ-DEPEND=CL:*279060
CQ-DEPEND=CL:*279158
CQ-DEPEND=CL:*279037
TEST=make buildall; tested on Cr50 hardware
Everything builds. Since we never used this arg anyway, there had
better not be any difference in the result.
Change-Id: Id3f71a53d02e3dc625cfcc12aa71ecb50e35eb9f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374163
Reviewed-by: Myles Watson <mylesgw@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Do not power-on the AP unless battery can provide sufficient power
or the charger is negotiated to sufficient power.
BUG=chrome-os-partner:56494
BRANCH=none
TEST=Manually tested on Reef. Device can boot to OS without the
battery & cut-off battery.
Change-Id: Ib22bad81a29ccbb2fecc8e835148b627dd722988
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/374023
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
When SW sync is enabled and the board enters G3 after being up
there was no way to boot the board again because the
system_jumped_to_this_image() check disallowed the pmic startup
sequence. One needs to check if the pmic is also already on
before bailing on the pmic startup sequence.
BUG=chrome-os-partner:56530
BRANCH=None
TEST=Booted. Jumped to RW EC. Shutdown system. Can boot again once
G3 entered.
Change-Id: I71670ceee09536a282479d1eca6a3ce264f0f5d3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/374080
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
There is only one set LED in reef, so with charger attached, LED behave as
charging LED; without charger, as power LED.
BUG=chrome-os-partner:55492
BRANCH=none
TEST=on reef proto, verified power led behavior is correct in s0/s3/g3
Change-Id: If6b83c46fc4b8b455531698177f559ca319d241a
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/366102
Commit-Ready: Kevin K Wong <kevin.k.wong@intel.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously this was only done when the board version is EVT or less
and when daughter card is inserted. However board version can not
be determined at this stage of power up since the function
board_get_version() relies on reading Board ID ADC and ADCs have not
yet been initialized.
This pull up can be removed in future board versions in which the
daughter card will always be in place and an internal pull-up will
no longer be needed.
BUG=chrome-os-partner:55488 chrome-os-partner:56039
BRANCH=none
TEST=verify board has no watchdog reset when daughter baord
is not connected. Also verify from EC log timestamps that
there is no delay of approximately 1 second between
"Inits done"and "KB init state"
Change-Id: I68eff923dd795b7b2f23f88028ee14d1e845b401
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/370958
Commit-Ready: Kevin K Wong <kevin.k.wong@intel.com>
Tested-by: Kevin K Wong <kevin.k.wong@intel.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Turn off PP3300_A, PP5000_A, and PMIC when chipset_do_shutdown is called.
BUG=chromium:54962
TEST=Press power button for 9 seconds and confirm that PP3300_A, PP5000_A,
and PPVAR_VNN are at 0 volts. Also verify that system boots from G3 when
power button is pressed.
BRANCH=None
Change-Id: Ib8347873728e3940fd588599403c94d0f264f64c
Signed-off-by: Rachel Nancollas <rachelsn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371340
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Rachel Nancollas <rachelsn@google.com>
Tested-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
There were a few things wrong with the way I2C pins were originally
set up:
- EC_I2C_SENSOR_SCL was moved from GPIOA0 to GPIO92.
- EC_I2C_GYRO_SCL/SDA and EC_I2C_POWER_SCL/SDA were swapped.
BUG=chrome-os-partner:53791
BRANCH=none
TEST=Motion sensors work now.
Change-Id: Id867c56b625da27e8ad82b503ae11173d7f855cc
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347754
Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Martin Roth <martinroth@chromium.org>
KSI2 get stuck when Refresh+Pwrbtn is used to reset EC,
so it was not able to detect the Esc key if it is also
pressed to enter recovery mode.
BUG=chrome-os-partner:55548
BRANCH=none
TEST=Reef EVT is able to enter recovery mode with Esc+Refresh+Pwrbtn
Change-Id: I0539e8fad9980cb563de94417079fe763c311887
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/366411
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
when the daughter board is not connected, TCPC1 INT# (USB_C1_PD_INT_ODL)
will be floating since the external pull-up is located on the daughter
board as well, and this floating signal will cause an interrupt storm
and eventually cause a watchdog.
BUG=chrome-os-partner:55488
BRANCH=none
TEST=verify board no longer has watchdog reset when daughter baord
is not connected.
Change-Id: If1d73fa7d90f6ac52fd1ab0ac563a6bf5fd10dc0
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/365499
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reef doesn't have the battery temperature sense pin connected to
the charger, hence reading the battery temperature from the battery
registers.
BUG=chrome-os-partner:55834
BRANCH=none
TEST=Using 'battery' & 'temps' console command verified,
temperature readings are same from both the commands.
Change-Id: I897e453296151f31344f3e0434202baa67c7025d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/365970
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This adds a hook that will run every second and complain if the EC
firmware was built for the wrong board.
BUG=chrome-os-partner:54947
BRANCH=none
TEST=tested on proto and EVT units
Change-Id: I9799249f74f3cea9a3f6b66b2441af8f16be7e01
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/365505
Reviewed-by: Martin Roth <martinroth@chromium.org>
ESC+F3+Power+AC removal puts the battery into a soft-disconnect state
where is stops supplying current. Revive batteries in this state by
supplying a precharge current.
BUG=chrome-os-partner:55858
BRANCH=None
TEST=Manual on reef. Put battery into soft-disconnect state. Attach
charger and verify EC doesn't lose power and battery again supplies
current.
Change-Id: I9a772bf02a8bd40edc1db51de66de135f7299212
Signed-off-by: Rachel Nancollas <rachelsn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/365495
Commit-Ready: Rachel Nancollas <rachelsn@google.com>
Tested-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
