This doesn't make any sense to expose to the console, so we can
save some logic and string literals by only compiling it for the
simulator.
BUG=chrome-os-partner:32203
BRANCH=ToT
TEST=Checked console does not support command. ectool still
works and the lightbar simulator still has the command.
Change-Id: Ib216c7c11fd3d0d2d444ef7fc0dda4e451103219
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220834
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Enabled deep sleeping during S0. This was previously inhibited by
SLEEP_MASK_AP_RUN but the new config option (CONFIG_LOW_POWER_S0) will ignore it.
SPI needed a sleep mask, it essentially gets enabled and disabled whenever the
CS changes. Warning: waking up when the CS falls takes a little time, if the AP
sends fast data before the 48MHz clock is enabled characters will get corrupted;
leave about 30uS time for the clock to start.
CQ-DEPEND=CL:219997
CQ-DEPEND=CL:220243
CQ-DEPEND=CL:220461
BUG=chrome-os-partner:32223
BRANCH=none
TEST=load onto pinky, boot the AP(S0), use idlestats command to verify
that we are going into deep sleep (STOP mode). Verify that everything works
normally during S0(SPI, keyboard, anything that requires the EC to wakeup).
Change-Id: I81c4fa472332f1ad8ad93301089a99dcdb108948
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219555
Reviewed-by: Alec Berg <alecaberg@chromium.org>
We have giant switch-case just for translating USB PD host command
parameters. Let's change this to lookup tables so that it's clearer and
also reduces code size.
BUG=chrome-os-partner:32203
TEST=make buildall
BRANCH=None
Change-Id: Ieef0e989bd0faa95e261748a73250c53f0942dad
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220511
Reviewed-by: Alec Berg <alecaberg@chromium.org>
We don't need the upper two bytes of any elements in the ramp table,
since none of them are big enough to flow into them. This saves us
another 60-70 bytes.
BUG=None
BRANCH=ToT
TEST=Manual, visual inspection
Change-Id: Id9d03b8f63e61172c5cc6b36b010582957c7bb22
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220595
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
We do some unnecessary work here. All we are trying to do is decode,
and decode already does all the error checking we want. Saves
20 bytes.
BUG=None
BRANCH=ToT
TEST=Run programs with JUMP and SET_DELAY_TIME opcodes in simulator
and on hardware.
Change-Id: Ia55f9010da50fe748bda565e069359162cc92b4f
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220630
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Currently, when an assertion fails, the error message is like:
ASSERTION FAILURE '1 + 1 == 3' in command_apreset() at common/chipset.c:24
To save flash space, let's add an option to remove the failed
expression and function name. The error message becomes:
ASSERTION FAILURE at common/chipset.c:24
BUG=chrome-os-partner:32203
TEST=make buildall
TEST=Add an assertion and triggers it. Check error message.
BRANCH=None
Change-Id: Ie323d5b43cbff2cd8f6cd5bb46c1f34ecd16bd5e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219670
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This removes the special casing around HALT. It saves us a string
literal and some logic. In total, we gain about 50 bytes and a
little cleanup for this.
BUG=None
BRANCH=ToT
TEST=Tried a program that uses HALT (i.e. red-green-blink) in
simulator and on hardware.
Change-Id: Iffee1b559983fd1ecd385cc6b8967f72a6b968a0
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220589
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Not sure why these were around. They were making RAMP_ONCE and
CYCLE_ONCE do obviously incorrect things.
BUG=None
BRANCH=ToT
TEST=Manual, visual inspection
Change-Id: I618078e8bef8824f5449d5b5453924beb36d50e1
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220463
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
cycle_010 now uses a table one-fourth the size and does a small
bit of linear interpolation in order to save space. This change
saves around 350 bytes.
BUG=None
BRANCH=ToT
TEST=manual; inspection that ramping still looks smooth
Change-Id: Ib5900630ba4a471a6284660377134724070babdc
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220430
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Previously we had a restriction that only one i2c bus could use the
automatic wedge detect and unwedge functionality. This removes that
restriction, although it uses a mutex to make sure only one bus is
being unwedged at any given time.
BUG=chrome-os-partner:26485
BRANCH=samus
TEST=make -j buildall
Change-Id: I8ff238fb8a9e9d2f5bc57a2b0a05e2b231024772
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220466
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
2048-bit RSA public key cryptography signature verification code
which uses a pre-processed key for computation.
it is based on the code from vboot :
platform/vboot_reference/firmware/2lib/2rsa.c
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:28336
TEST=using following CL, on Zinger, verify RW firmware signature.
Change-Id: I681a29144eb805cd5758aa6efe697ce2f656a298
Reviewed-on: https://chromium-review.googlesource.com/220186
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Sometimes I2C1 is wedging and this can cause the ALS task to
overflow its stack.
As a temporary measure to stop the random reboots increase the
ALS task size.
BUG=chrome-os-partner:32471
BRANCH=samus
TEST=build and boot on samus with stuck I2C1
taskinfo before (after fresh reboot):
2 ALS 00000000 0.001012 364/384
taskinfo after (notice it is >384 after some time):
2 ALS 00000000 0.031586 400/512
Change-Id: I04e9b93d3cc60afd3303eb4610c81952f365b992
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220442
Reviewed-by: Alec Berg <alecaberg@chromium.org>
BUG=none
BRANCH=ToT
TEST=manual
make BOARD=samus
for i in extra/lightbar/programs/[g-z]*.bin; do
./build/samus/util/lbcc -d $i /tmp/x.lbs
./build/samus/util/lbcc /tmp/x.lbs /tmp/x.bin
cmp $i /tmp/x.bin
done
Change-Id: I86c014c425e917ecafadd1c6845fcf2e5b4edbb7
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220244
This pin is already set to out+low so it should be fine to rename
it on EVT1 boards.
BUG=chrome-os-partner:32031,chrome-os-partner:32359
BRANCH=samus
TEST=make buildall
Change-Id: I0d904b0301b793bbfa1d829b4fce60e0b1154b00
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220259
Reviewed-by: Alec Berg <alecaberg@chromium.org>
If there is any delay between AC status and the battery charge status
it is possible for the power_manager to read the battery state when
the AC status event is sent and still see that the battery is not
yet charging. This can cause lag in the UI battery icon because the
AP is not notified when the battery charge state changes.
In order for the host to be able to differentiate the dynamic battery
state changing (re-read ACPI _BST by sending Notify 0x80) from the
static battery info (re-read ACPI _BIX/_BIF by sending Notify 0x81)
it needs a separate host event.
BUG=chrome-os-partner:32196
BRANCH=samus
TEST=Test AC instertion and removal while watching state on the host
to ensure that an event is sent to the host which triggers power
manager to re-read the battery status and notice that the charge
state has changed if there is any delay after the AC status event:
watch -n 0.1 "cat /sys/class/power_supply/AC/online;
cat /sys/class/power_supply/BAT0/status;
tail -10 /var/log/power_manager/powerd.LATEST"
Change-Id: I18ce70719dc231c43c474cefad2068f949675a2b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220257
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add low power mode for zinger. This uses stop mode in task_wait_event(),
the non-runtime equivalent of the idle task.
BUG=chrome-os-partner:28335
BRANCH=samus
TEST=load onto zinger and plug and unplug into samus a bunch of times
to make sure it negotiates to 20V every time. also send custom vdm's
from samus_pd and make sure those always succeed.
Change-Id: I626365e7d22e030792d28dbf7eafaeb8f54f8a74
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219933
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
This patch fixes stary floating point usage in lightbar module. They
should be scaled by FP_SCALE and of type 'int'.
BUG=None
TEST=Compile and make sure the compiler is not using floating point
related instructions.
BRANCH=None
Change-Id: I8d598af1014160b83bc44ef3e88e2cc4bf304e5e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220121
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Eric Caruso <ejcaruso@chromium.org>
i2cdetect -q was broken on the AP. The way it works is by sending a 0 length
write request and checking for NACK. The stm32f0 driver had to be fixed to
actually return non-success if there was a NACK. i2cdetect -r worked so far
because it relied on a 1-length read and we indirectly detected NACKs by the
lack of data.
The error catching also had to be moved(in both drivers) before the success
returns, because it is possible to transmit something successfully(buffer got
emptied) without getting an ACK. We want this to be an error.
BUG=None
BRANCH=None
TEST=veyron: i2cdetect -y -r 20 0x09 0x0b should display -- on the 0x0a spot
since there's no device there. i2cdetect -y -{r,q} 20 should display the same
thing.
Change-Id: Id6cadb798e4d972dea089f15742e5b30888a038b
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220185
Reviewed-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:29041
BRANCH=ToT
TEST=manual
From the host run
ectool lightbar demo on
Then press the 'T' key. The lightbar should change to indicate
the charge state. Fiddle with the arrows to change the pretend
battery level and AC presence.
Change-Id: I398a829e2e5de5e1a186500aa2ed72c61e71deaa
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/220024
Reviewed-by: Alec Berg <alecaberg@chromium.org>
These programs test various bytecode interpreter functions.
rainbow-shift, red-green-blink and green-pulse produce visual
effects, whereas the other three programs test error cases.
bad-jump makes sure the interpreter stops if the PC goes
out of bounds. bad-opcode makes sure the interpreter stops if it
does not understand the instructions it is decoding.
infinite-jump makes sure that sticking a tight loop in the EC
(i.e., one not perforated with any DELAYs, RAMP_ONCEs, or CYCLE*s)
does not cause it to hang or crash. bad-decode-8 and -32 test that
malformed instructions are detected while decoding the
instruction's immediate data.
BUG=None
BRANCH=ToT
TEST=In simulator/scp files to device and test
Change-Id: I6c189997a13e7c6196daa28eb74d5506b5288f2b
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219565
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Remove 4kB reserved flash for pstate since we don't use persistent
state flash on zinger and flash space is limited.
BUG=none
BRANCH=none
TEST=make -j buildall. load and run zinger.
Change-Id: Id0020932ed47873d22e81516abf97b4279a7deae
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219932
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Enable flash prefetch buffer for stm32f0 chips to make for
faster CPU execution.
BUG=none
BRANCH=none
TEST=load onto samus_pd and zinger. let run for a while.
connect/disconnect AC a few times. boot samus.
Change-Id: I88c0ae67a3205987344552f5b44952f9890c8177
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219921
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Enable low power idle for veyron (with uart wakeup as well).
Low power idle is only active in S5/S3.
Also sorted options from board.h
BUG=chrome-os-partner:31226
BRANCH=none
TEST=load onto pinky-proto1, use idlestats command to verify that we are going
into deep sleep (STOP mode). Run 30 min. and verify no watchdog reboots or
anything out of ordinary.
Change-Id: Id14b04f33ea46b1e6cca1c8e812b5875e9ee0446
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219044
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Fix potential bug in pd_soft_reset() function. That function is
part of a global API and as such can be called by other tasks.
For example, a sysjump which takes place as part of host command
task. So, this function should not directly initiate PD communication
because if it is interrupted by the PD task, then there will
be unpredictable behavior since the send_validate_message() is not
designed to be re-entrant for a given port.
This changes pd_soft_reset() to simply change the PD state to
SOFT_RESET and then wake up the task to actually send the command.
BUG=none
BRANCH=none
TEST=you can test this with a type-C to A receptacle dongle. The
dongle has a pulldown on the CC line, but no device to respond to
PD comms. When you plug in C to A cable, samus should send source
cap repeatedly for 5 seconds. During that time, if you do a sysjump
from RO to RW, it will call pd_soft_reset(), which will send the
soft reset command. But, since there is no device it will timeout
and retry 3 times. During that period, the PD task will wake up
and try to do it's own thing, causing craziness and eventually a
hang and watchdog reset.
With this fix, I can plug in a C to A adapter, and sysjump to RW
cleanly.
Change-Id: Icab936ab8ab930e8e37b5a23825f7f054a50c177
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219893
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Fix potential bug in ADC initialization. After setting ADEN bit to
enable ADC module, we must wait for ADRDY (ADC ready) bit before
continuing. This bug only affects a few chips, and only some of
the time.
BUG=chrome-os-partner:31978
BRANCH=none
TEST=Used a samus board where the PD MCU fails ADC initialization
quite often. Without this fix, if you reboot the PD MCU, it will
sometimes come up with all ADC's reading 0 and ADEN reading 0.
With this fix, it always boots with the ADC's working
Change-Id: Iba1d0e56006ba1ad6d9f0eee964a70ef2d0f8dcf
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219522
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
This diff allows the user to send small programs to the EC and
gain control of the lightbar. Right now, this is only exposed
through ectool, and sysfs support will come later.
To send a program to the EC, use
$ ectool lightbar program /path/to/program.bin
and then start running the program with
$ ectool lightbar seq program
BUG=None
BRANCH=ToT
TEST=Using the above steps with hand-assembled programs.
Checked that infinite bytecode loops do not hang the EC.
Checked that bad opcodes exit with an error.
Stress tested pushing programs and changing sequences.
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Change-Id: I635fb041a5dc5c403f7c26fb9a41b5563be9b6b7
Reviewed-on: https://chromium-review.googlesource.com/219558
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This code is used to find the orientation of the sensor.
Given sensor are aligned with the edges of the device,
it is not too dificult to find manually.
BRANCH=ToT
BUG=None
TEST=Check ACCEL_CALIBRATE is not used anymore.
Check 'make buildall -j' works.
Change-Id: I81ffcb4f6b01c530ef16baf13113a5942f615092
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219527
Reviewed-by: Alec Berg <alecaberg@chromium.org>
RX DMA seems to get misaligned sometimes yielding to extra bytes before the
first byte on the wire.
in_msg=[00 00 00 03 f4 09 00 00 ...]
^ real first byte
To fix this we want to reset and reinit the SPI peripheral after every packet,
in the same place where setup_for_transaction() is called.
This bug applies to the STM32F0 line but resetting the peripheral on other STM32
ECs should not break anything.
BUG=chrome-os-partner:31390
TEST=On STM32F0:
ap# cd /sys/class/power_supply/sbs-20-000b/; while true; do grep "" * >/dev/null 2>&1; done
You should not see "SPI rx bad data" with in_msg packets that have extra bytes
in the beggining. Wait though, it might take up to a few minutes for stuff to
break.
BRANCH=None
Change-Id: If9ab93c5c9040a2c7bda33d7cc990603f1121f3f
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/217527
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This task echo's all bytes from any console stream back to all
other console streams. It is a test case for the new
multi-USART and USB stream drivers.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manual testing of cutting and pasting large blocks of text
into the echo'ed usarts, and verifying no dropped characters.
Change-Id: I408c77e40931d3a473657326f9772e71a7ae8a60
Reviewed-on: https://chromium-review.googlesource.com/213178
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
STM32F and STM32F0 series require an MOE bit to be set to enable PWM
output. In addition, require that the PWM alternate function # be
manually specified for STM32F0 -- there seems to be no logical mapping
here, unlike other STM32* parts.
BUG=chrome-os-partner:32089
TEST=Manual on samus-pd. Set ILIM PWM output to 50% duty cycle with pwm
driver functions, probe and verify avg. 1.62V on pin.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Icb13a153fa3eee52be938d76a6c980fe6fd2bb3e
Reviewed-on: https://chromium-review.googlesource.com/219570
Reviewed-by: Alexandru Stan <amstan@chromium.org>
Tested-by: Alexandru Stan <amstan@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The 'power' console command is entirely redundant:
- 'power on' can be replaced by 'powerbtn'.
- 'power off' can be replaced by 'apshutdown'.
- 'power' can be replaced by 'powerinfo'.
Let's remove this command to save flash space.
BUG=chrome-os-partner:32203
TEST=Build Ryu.
BRANCH=None
Change-Id: Ib33804c1748dd44bbb89277fed938b50f0f946c4
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219491
Reviewed-by: Alec Berg <alecaberg@chromium.org>
The warning should only warn if there's an actual danger(in order to give a
clue to developers that something might be amiss). Messages like "Overriding
SPI1_NSS with SPI1_NSS on EXTI4" are just spammy. This patch makes it so it only
warns if the interrupt is different.
BUG=chrome-os-partner:31390
TEST=spam gpio_enable_interrupt(GPIO_SPI1_NSS); in a bunch of places (like
spi_event), it should not complain about the interrupt being set to the same
thing before. Whereas before it was so spammy it did not even have time to reply
to SPI.
BRANCH=None
Change-Id: I786a821eb8167e3568d0be371c4de26bb124431a
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218563
Reviewed-by: Randall Spangler <rspangler@chromium.org>
'powerindebug' is only used when there is a problem with power
sequencing. 'taskready' is rarely used and the same info can be
retrieved by 'taskinfo'.
Put both behind config flags and disable 'taskready' by default. Also
disable 'powerindebug' for Ryu.
BUG=chrome-os-partner:32203
TEST=Build Ryu and check flash space used.
BRANCH=None
Change-Id: I753a1f5411d6e840a80aba03afc94f9640d381a8
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219490
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Just after a bad data error the EC will print the packet(pretty much the whole thing):
in_msg=[02 00 0f 03 f4 09 00 00 ]
I found it very helpful when debugging SPI TX/RX to know what the EC sees.
BUG=chrome-os-partner:31390
TEST=Load spidev and send the EC bytes manually(malformed packets)
BRANCH=None
Change-Id: I037ab909076dc454379040e2e927dc6a0b5c5ea9
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/218442
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Fix accel calibration bug from refactoring. The motion_get_accel_lid()
function used by calibrate routine to get lid accel data was actually
returning base accel data.
BUG=none
BRANCH=none
TEST=load onto samus, run accel calibration routine.
Change-Id: I095381390267aa6ea3b3a74311c27f30d70e9c81
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219520
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Not every chip that we use has FPU. To make it easier to enable lightbar
on chips other than LM4, let's remove floating point usage in lightbar
code. Instead, scale those numbers by a factor of 10000.
BUG=chrome-os-partner:32203
TEST=Run on Samus. Visually check lightbar.
BRANCH=None
Change-Id: I88b12bb66b5c586f2e14135069bd97d6b56832a1
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219246
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
When a cable is connected, set USBC_POLARITY to the right polarity. This
is done in a different way than how we do this on other boards because
we only want to control polarity automatically on cable connection.
BUG=chrome-os-partner:32163
TEST=Flip the cable, check USBC_POLARITY changes.
BRANCH=None
Change-Id: I903123b8fd729e8c913014b83812d20328600f8e
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219291
Reviewed-by: Alec Berg <alecaberg@chromium.org>
When 5v/12v/20v buttons are pressed, plankton first switchs to source
role, set the requested source cap, and then perform a soft reset.
However, if plankton was sink and just switched to source, the port
partner might not have switched to sink and this leaves the CC line in a
state where communication is not possible. The subsequent soft reset
then fails. If we are not already sourcing power, we actually don't need
a soft reset after changing source cap.
BUG=chrome-os-partner:32163
TEST=Switch from sink to source. Doesn't see "soft reset" in console.
TEST=Switch from 5V to 12V. See "soft reset".
BRANCH=None
Change-Id: Ia4b834c2e7dc1324b9143c46a72938845499e2fb
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219004
Reviewed-by: Alec Berg <alecaberg@chromium.org>
On power-on reset, the USB hub might get stuck in a locked state due to
a race condition in hardware. Let's reset the hub after 0.5 seconds to
make sure this doesn't happen.
BUG=chrome-os-partner:32163
TEST=Power on the board. Measure the reset signal.
BRANCH=None
Change-Id: I0f89883c5db7c5376f3612da1615ba4f86b5efa6
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/219199
Reviewed-by: Alec Berg <alecaberg@chromium.org>
