On most platforms, the power button is active low,
but the power button on Ryu is active high.
Add CONFIG_POWER_BUTTON_ACTIVE_STATE to override the default active
state.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Ryu, use the servo pwr_button to start and stop the AP.
Change-Id: I11c6bb3c700bccd3606ce1fa1a69905671792990
Reviewed-on: https://chromium-review.googlesource.com/207274
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Update the code to be compatible with charge v2 expectations :
never return EC_ERROR_UNIMPLEMENTED for battery information else the
charge code continuously tries to read them again.
Fix the State Of Charge reading : on BQ27741 the gas gauge gets confused
if we do a 16-bit I2C read while a 8-bit read works perfectly.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run a Ryu connected to a Kirby battery and check the output of the
"battery" command.
Change-Id: Ic1d6128dc02efa47662fa5ca5b9e5de62420ebe8
Reviewed-on: https://chromium-review.googlesource.com/207273
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
The interrupt handler is hardcoded to I2C1. We should choose between
I2C1 and I2C2 based on I2C_PORT_EC.
BUG=chrome-os-partner:30707
TEST=On Ryu, ectool hello and see ACK.
BRANCH=None
Change-Id: I07055b0ee7459e6cac5585737e200ff2d5814a34
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209960
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Changes to match this part of the spec:
The Sink shall support the SinkWaitCapTimer. When a Sink observes an
absence of Source Capabilities messages, after VBUS is present, for a
duration of tTypeCSinkWaitCap for the Type-C connector and
tSinkWaitCap after VBUS is present,for all other connectors the Sink
shall issue Hard Reset signaling in order to restart the sending of
Source Capabilities messages by the Source (see Section 6.6.4).
tTypeCSinkWaitCap shall be between 210 and 250 ms
Also set send source cap period appropriately:
tTypeCSendSourceCap shall be between 100 and 200 ms
This should help avoid transmission collisions during negotiation.
BUG=chrome-os-partner:30135
BRANCH=none
TEST=load onto zinger and samus and verify they negotiate correctly
10 times. Then loaded custom code to zinger to not send source cap
and verified we send hard reset. Also tested plankton to samus
negotiation works.
Change-Id: Idd6118e3e0a9f7a96ebeae9518c8b10457232c70
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209558
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Board support for Planton, the Raiden testing board for type-C
functional testing.
BUG=none
BRANCH=none
TEST=make BOARD=plankton, load onto a plankton, and verify
buttons are read correctly, and connect raiden to samus and
verify that PD communication is successful
Change-Id: I40922d5627d62f7f3540ac6a307596428d40baf5
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207724
Veyron only has one bicolor led (green and orange) near the AC connector.
I dedicated the green channel for displaying power status:
* Power on: Green
* Suspend: Green in breeze mode ( 1 sec on/ 3 sec off)
* Power off: OFF
Charging is now displayed only on the orange channel:
* Fully charged / idle: Off
* Under charging: Orange
* Battery low (10%): Orange in breeze mode (1 sec on, 3 sec off)
* Battery critical low (less than 3%) or abnormal battery
situation: Orange in blinking mode (1 sec on, 1 sec off)
* Using battery or not connected to AC power: OFF
The unfortunate side effect is that they have to share. So while the laptop is
charging in standby the led will blink orange(1s)-yellow(3s). While it's a
little ugly (it would have been nice to have 2 separate leds), it still provides
more information than how it was done before (where there was no indication of
power state).
BUG=None
TEST=Go through the various states (charging on/off/low and power on/off/
/suspend (warning: kernel doesn't report suspend to the EC properly yet, one can
still test this by reverting c/209668 "veyron: fixed SUSPEND_L line"))
BRANCH=None
Change-Id: I8ca0fb0909da1a186e4e5c451d8868e977b3ca1b
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209911
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Commit-Queue: Doug Anderson <dianders@chromium.org>
for interface specific requests, the interface number is equivalent to
(wIndex & 0xff). this corresponds to ep0_buf_rx[2], since the setup
packet has format: bmRequestType (1), bRequest (1), wValue (2),
wIndex (2), wLength (2).
BUG=none
BRANCH=none
TEST=verify stm32 does not panic with multiple interfaces
Change-Id: Ied7750035f87fa81f9a6c03c6e73ae606c110398
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209903
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Ensure that the slow OCP (thermal/power protection) is not triggering
for power spikes below 20us, by sampling 4 times (with a 5us sampling
period).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28331
TEST=connect Zinger to Firefly+electronic load, test with various
current pulse widths and amplitudes.
Change-Id: Ic8150dbbf191c002bba9e8d3f70beb47af4577b9
Reviewed-on: https://chromium-review.googlesource.com/204588
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Include a force source mode for dual-role ports to allow us to
force a dual-role port into being a source.
BUG=chrome-os-partner:28782
BRANCH=none
TEST=tested on plankton, verified using the pd 0 dualrole console
command.
Change-Id: Ic4c2a9e11984b34b1dec09d5c71e1fd15ed9198c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209071
Reviewed-by: Vic Yang <victoryang@chromium.org>
Adds dual USB-PD port support for samus. Both ports are in dual-role
and can perform either role.
Both ports work fine when only one of the ports is in use. But,
still having problems with PD errors on the lower priority port (port
0). If you have a charger plugged into port 0, and a type-C USB dongle
plugged into port 1, then port 1 has higher priority, and in the
SRC_DISCONNECTED state, every 1.5 seconds when it sends source cap
packet, we occasionally drop pings on port 0, which results in a
lot of start/stop charging.
BUG=chrome-os-partner:28585
BRANCH=none
TEST=Tested on samus to make sure both ports work when I
plug in a charger and a type-C USB dongle with a pull-down on the CC
line. Tested on plankton and zinger to make sure PD works as expected.
Change-Id: Ie7bde3e258f5cd23a0b82b626c0993a45b0df074
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200750
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
servo is already aware of the sensor hub.
Using samus_pd as an example, set the proper argument to flash
an image to the sensor hub.
BUG=chrome-os-partner:30801
BRANCH=None
TEST=None
Change-Id: I0c8465d1e34d515224675957c3e8482392585a56
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209232
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Increase RAM_SIZE for all stm32f07x chips to 16kB to use all of
on chip SRAM.
BUG=none
BRANCH=none
TEST=added 4000 byte array, verified in ec.RO.map that we are using
the new RAM space (bss size over 0x2000), loaded on samus and
verified that we could read and write to the 4000 byte array.
Change-Id: Ided3ce7c5fb353c9c37a01e6ed64f03786717e9b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209847
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Pulled down line so it's not so erratic.
Fixes the issue where the EC doesn't know what state the AP is in.
BUG=None
TEST=EC should report S0 correctly(not S3 all the time). `power on` and
`power off` will also work correctly(instead of doing absolutelly nothing).
BRANCH=None
Change-Id: I69bd17b39d2bd8f7f0456c4babc4ad9f8f34c8bd
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209668
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Like Samus, the battery can be placed into a disconnect state. This CL
implements the necessary function to determine if it is so and kick it
out of this state when possible.
BUG=chrome-os-partner:30633
TEST=Put a battery in this state. Plug in AC. Verify the battery is
revived.
BRANCH=None
Change-Id: I074a72a2efe3844cbdfb0eda16a25fd8d1755a9b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209634
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Check for warm reboot before initializing ADC. Part of the initialization
process involves calibration of the ADC, which can only be done when the
ADC peripheral is disabled. This fixes a bug on samus_pd where jumping to
RW causes a watchdog because ADC reads hang.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=on samus_pd, without this change running sysjump rw causes us to jump
to RW and then causes a watchdog. With this change sysjump rw works. Also
verified that PD communication works in RW, which means ADC channels are
being read correctly after jumping to RW.
Change-Id: Iaa41da4795c3d15a6db56b0d715e36c29417d9b6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209331
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This patch is base on new hardware board, veyron has not some stuff,
such as power led, charge en
BUG=None
TEST=Read log with servo board, it has reponse when type some commends
BRANCH=None
Change-Id: I45502fd1278f69db5e46fc9ab1deaee02fc8708f
Signed-off-by: zyw <zyw@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/209231
Reviewed-by: Alexandru Stan <amstan@google.com>
Commit-Queue: Alexandru Stan <amstan@google.com>
Tested-by: Alexandru Stan <amstan@google.com>
The Samus battery can be placed into a disconnect state by asserting a
disconnect input signal. In this state, the battery will not function
until a charging current is applied. This patch adds detection of the
disconnect state. If a battery in disconnect state is found, a current
is force-applied to the battery to kick it out of disconnect.
BRANCH=None
TEST=Manual on Samus.
1. Put battery into disconnect state
2. Pull AC, then reattach AC
3. Verify "found battery in disconnect state" is seen on the
EC console.
4. Pull AC and verify that EC console is still accessable
Also verify that battery gets out of reset state:
1. Pull AC
2. Issue "i2cxfer w16 0 0x16 0x0 0x12" command on EC console
3. Re-attach AC
4. Pull AC and verify that EC console is still accessable
BUG=chrome-os-partner:29465
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib4268887fb483094ac4e641749200268160d3014
Reviewed-on: https://chromium-review.googlesource.com/209013
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Only one EC was an i2c slave, samus_pd.
Now we have 2 more, ryu and ryu_sh (sensor hub).
Define a new variable: CONFIG_HOSTCMD_I2C_SLAVE_ADDR
TEST=Compiled
BRANCH=None
BUG=chrome-os-partner:30740
Change-Id: I484aaf5ca72f14a91ce261b91fbe600dca3474dc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208978
Reviewed-by: Randall Spangler <rspangler@chromium.org>
We want repeated start instead of stop+start. Apparently, we need to set
START bit along with read configuration. Otherwise, the I2C module
generates a STOP condition.
BUG=None
TEST=Monitor I2C with a logic analyzer. See repeated start instead of
stop+start.
BRANCH=All using stm32f0.
Change-Id: I47491e240f2543e5d023e950d15468ec0e3c301b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208760
Reviewed-by: Alec Berg <alecaberg@chromium.org>
We are now using argv[5] even if the user only gives 5 arguments. Fix
it.
BUG=None
TEST=Read with i2cxfer command and doesn't see "Invalid param 5"
BRANCH=None (this can be worked around by adding a dummy param)
Change-Id: Ice13fec4ad53c71b6529daa3510fa6fc1d7f8c00
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208489
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Previously these macros took a small integer to identify the USART
to access. This integer was token concatenated to form the macro
name that resolved to the base address. This made it imposible to
use these macros in a driver that could manage more than one USART
because there was no runtime way to go from base address (or other
unique identifier) to register address.
This change makes it possible to pass either a static compile time
known base address or a runtime variable with the base address,
thus supporting either sort of driver. The existing USART driver
has been updated to compute the base address of the console USART
and pass that at compile time, resulting in no increase in code
size.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of console over UART functionality
on the STM32F072 based discovery board.
Change-Id: I06547a173b1e5cf625a57019ea4b8a84d1768444
Reviewed-on: https://chromium-review.googlesource.com/208488
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
This is a straightforward conversion of existing tables
into X-Macro style definitions for the GPIO alternate
functions. This change in itself, is not particularly
powerful, but having all GPIO settings in a single file
makes a board easier to understand.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of interrupt on change and UART
functionality on STM32F0 based discovery board.
Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579
Reviewed-on: https://chromium-review.googlesource.com/207987
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Previously the F0 and L variants had almost identical driver files
and the F variant shared about half of its driver. This refactor
moves the shared code into gpio.c and gpio-f0-l.c, the latter
is for code shared between the F0 and L variants.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of interrupt on change and UART
functionality on STM32F0 based discovery board.
Change-Id: I920babd1861548272af2857c8bd3e4f9dac4985c
Reviewed-on: https://chromium-review.googlesource.com/207986
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
The ILIM control line is inverted before reaching the USB charge
controllers when they are cross-connected to allow only one port
to deliver the HIGH current limit at a time.
BUG=chrome-os-partner:29053
BRANCH=ToT
TEST=Verify, with a multimeter, that ILIM (pin 4) on a TPS2546
is 3.3V when the chargemode is set to CDP
Change-Id: I2f720d04b959417ae96687d7e30ee60270eeccb9
Original-Change-Id: Idd89dcfc117f1f3393ded1887e8d1cb27ba367ad
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/205811
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208161
When emerging chromeos-ec for ryu the build blows up when doing
tests. Remove all tests for RYU so that we can start building the
EC code through the build system.
BUG=chrome-os-partner:30659
BRANCH=None
TEST=Can emerge-rush_ryu chromeos-ec
Change-Id: I293f2640891f42cfea0eb8aeb1ff1de603db9a93
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208063
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
With only mini-PCIe devices, we don't need to wait for the full 99ms that
PCIe devices require.
BUG=chrome-os-partner:25530
BRANCH=ToT
TEST=manual
Log in, connect to the web via WiFi. Close the lid, wait a bit, open the
lid. WiFi should resume and still work.
Change-Id: I24d6ae95607f8f9a0fa70aebf5eaa0ebd68260f6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200084
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This allows sending host commands to the PD chip through the EC.
The --interface option allows forcing a particular host interface.
This is necessary at present because the crosec device driver doesn't
support host protocol v3 so only has 8-bit command numbers.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=from EC console,
ectool version -> prints EC version
ectool --interface=lpc --dev=0 version -> prints EC version
ectool --interface=lpc --dev=1 version -> prints PD version
ectool --interface=lpc --dev=2 version -> prints error
ectool --interface=i2c version -> can't find EC
ectool --interface=dev version -> prints EC version
Change-Id: I9dd10578dac77e3e104d19e2f37759814eec6ca2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207948
This is needed for supporting device passthru. Right now, the --dev
option simply prints an error.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=manual
ectool -> prints an error
ectool help -> prints list of commands
ectool version -> prints EC version
ectool --dev=0 version -> prints EC version
ectool --dev=1 version -> prints error about bad device 1
ectool --dev=0 -> prints an error (because there's no command)
ectool --dev=0 foo -> prints 'unknown command foo'
Change-Id: I0f431a4789428cd6cc8ef48b396b38237935282a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207904
Add support for toggling between source and sink as dual-role
port. When transitioning to S0, we turn toggling on, when transitioning
to S3, we turn toggling off but remain in the same PD state, and when
transitioning to S5, we turn toggling off and force the PD role to a
sink.
Note, when toggling is off, the source disconnected state is
allowed to transition to sink disconnected, but not vice versa. This
means that if you go into S3 as a source, it will remain a source
until the device is unplugged, at which point it will transition to
a sink until the next transition to S0.
The spec specifies:
tDRP: 50ms - 100ms, Period a DRP shall complete a DFP to UFP and back
dcDRP: 30% - 70%, Percent of time that a DRP shall advertise DFP
tDRPHold: 100ms - 150ms, time to hold VBUS on after a DRP detects a UFP
tDRPLock: 100ms - 150ms, time to stay in DFP after detecting loss of UFP
This CL uses 40ms for time as a UFP (sink), 30ms for time as a DFP
(source), and 120ms for hold and lock times.
Also, if advertising as a DFP (source) and VBUS is detected, this
automatically switches to a UFP (sink).
BUG=chrome-os-partner:28782
BRANCH=none
TEST=test on samus, make sure we are toggling between source and sink
when disconnected. make sure plugging in zinger switches state machine
through to sink_ready and make sure plugging in a USB switches to
source_discovery. tested on a fruitpie by scoping the CC line and verifying
the timing (except the hold time which I can't easily test).
tested that dual role toggling is off in s3 and s5. also verified that
going into s3 as a source keeps the port as a source and going into s5
switches it to a sink.
Change-Id: I478634861f694164301d71359da35142ee7ebf75
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207154
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Host commands in the range 0x4000-0x7fff will be passed thru the EC to
the PD MCU as 0x0000-0x3fff.
BUG=chrome-os-partner:30079
BRANCH=samus
TEST=manual. On PD console:
hcdebug params
On EC console:
hostcmd 2 0 -> hex string of EC version
hostcmd 0x4002 0 -> hex string of PD version, and PD console shows host
command 2 was received. The hex response shown on the PD console
matches the one printed by the EC
Change-Id: Icc2d97c5977145a0c3ad2630d2b5a19e876a36d0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207821
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The 2 boards are similar enough to test stuff on big for now, at least
until the new hardware comes.
Also added veyron to flash_ec.
Also cleaned up the style: pre-upload.py was giving errors on files
that were unmodified from big(spaces instead of tabs).
I had to ignore this though:
> ERROR: Macros with complex values should be enclosed in parenthesis
> #471: FILE: board/veyron/board.h:35:
> +#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C
BRANCH=none
BUG=chrome-os-partner:30167
TEST=~/trunk/src/platform/ec $ make BOARD=veyron clean &&
make -j BOARD=veyron && util/flash_ec --board=veyron --ro
verify ec is alive and version is reported as veyron
Change-Id: I1f4bd562c0ab55360a2160a753ad8ad9b58f8c47
Signed-off-by: Alexandru Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207270
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Revert
- https://chromium-review.googlesource.com/#/c/205145/2
- https://chromium-review.googlesource.com/#/c/205147/4
Now using the real AC_PRESENT gpio signal instead of whether or
not the PD MCU negotiated for 20V.
BUG=chrome-os-partner:29841, chrome-os-partner:29842
BRANCH=none
TEST=tested on a board with reworked AC_PRESENT signal. Verified
that gpio is correctly reporting state of AC and is charging when
AC is plugged in. Tested the no battery case to make sure
board powers on and stays on with just a charger. Also tested the
dead battery case by plugging in a dead battery, then plugging in
a charger and making sure system powers on and starts charging.
Change-Id: I4424771c91c8a2aa19eda68a8b5194e9265d529c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206598
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Import code to do 64-bit multiplication on Cortex-M0 core without SMULL
instruction.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
add a 64-bit multiplication and see it compiled properly.
verify in .map files that the code is discarded for cortex-M0 based
platforms not using the 64-bit multiplication.
Change-Id: I0a91b3502f4bee4bb79b193fe0854e56a7d498f7
Reviewed-on: https://chromium-review.googlesource.com/207132
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
This version of the EC firmware just provides a console and some
blinking lights for the stm32f0 discovery board. This is a
convenient board to work with for peripheral bringup.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: I9ae87235e8a505d58fa7a5c996528c4dd6c3f2ac
Reviewed-on: https://chromium-review.googlesource.com/207130
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Now that gpio_get_level() always returns actual pin states, we can
simplify i2c_raw_get_scl/sda().
BUG=chrome-os-partner:26483
TEST=make buildall
BRANCH=None
Change-Id: Ifefb6fa5da8f566b44c419a0ea5adec41f8925e3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207057
Reviewed-by: Randall Spangler <rspangler@chromium.org>
