Add a description for the USB HID interface, neaten a bit of
console output. No new functionality.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ie85a0192bc4ab9fa87afb4be41d496545a3b548a
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/283051
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Concurrent SPI transactions are not possible, however in case of external SPI
and flashrom update scenario both host command and vhash trigger transactions.
This adds mutex for the SPI transcation
BRANCH=None
BUG=chrome-os-partner:38103
TEST=on Cyan, run hundreds of flashrom cycles to make sure there are no read,
erase or write errors
Change-Id: If346ebe635387d477dcea5f406a5c31579142e2d
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282113
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Reset cause was recorded / corrected only in RO/RW images.
lfw still has old implementation.This caused sysjump RO/RW to
not jump appropriately.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=on Cyan,sysjump RO and sysjump RW console commands
nd make sure it jumps to the right image.
Change-Id: I37138f552fdd385c98d770d242d896ffc014697c
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282210
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
When RO/RW sysjump is made watchdog is not disabled. Since LFW needs to
load firmware image into SRAM over SPI, there is a certain chance watchdog
counter will fire in the middle of it.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=on Cyan, run hundreds of flashrom cycles and make sure there is no
watchdog reset
Change-Id: Idafcc6a1c9fb35f04be398a68e3ec05bb2b1425d
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282112
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
flashrom on target issues a salvo of flash read commands with small
buffer size (128 bytes). Since there is no yield this starves other
tasks/events including hooks and as result watchdog is never reloaded.
This change makes read function yield to other tasks. In addition,
spi_enable()/disable chaining leads to situations where a SPI can be
disabled in the middle of transcation. This is addressed by keeping
SPI permanently enabled in LFW entry function, as well as in RW/RO
early init functions.
BRANCH=None
BUG=chrome-os-partner:38103
TEST=manual on Cyan, run flashrom -p ec -w xx in cycles, swaping xx so that
flashrom does flash. Make sure there is no watchdog triggered
Change-Id: Id5c50239a1d5c64054d7c660dd03b2be4678221c
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/282111
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
add GPIO_SEL_1P8V flag for 1.8v/3.3v selection.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. To configure 1.8V/3.3V pin to 1.8V,
set GPIO_SEL_1P8V flag in gpio.inc.
2. The corresponding bit will be set as default value if the pin
is not listed in gpio.inc.
Change-Id: Ica02aabe40b83fcb4d33bd28d717a0633bdef5f3
Reviewed-on: https://chromium-review.googlesource.com/281842
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Add npcx_evb_arm board-level driver for arm-based platform.
Add header.c: for booting from NPCX5M5G A3 Booter.
Remove lfw folder due to those functionalitie have been replaced with Booter
Modified drivers for
Patch Set 1:
1. flash.c: Implement UMA lock, tri-state and selection register lock functionalities
2. hwtimer.c: Add ITIM32 for hwtimer
3. lpc.c: Add checking for LRESET
4. system.c: Modified CODERAM_ARCH functions for NPCX5M5G A3 Booter.
5. uart.c: Add support for module 2
Patch Set 2:
6. lpc.c: Modified lpc_get_pltrst_asserted() func
Patch Set 3:
7. minimize the changes for CONFIG_CODERAM_ARCH in common layer
8. comments of Patch Set1/2
Patch Set 4:
9. Modified CONFIG_RO_MEM_OFF point to ro image and keep header as a part of ec.RO.flat.
10. Fixed RO_FRID and RW_FRID issues which caused by CONFIG_CODERAM_ARCH.
Patch Set 5:
11. Modified system.c in common folder for supporting *_STORAGE_OFF.
12. Use *_STORAGE_OFF in firmware_image.lds.S to indicate flat file layout in flash.
Patch Set 6:
13. rebase to newest version
14. system.c: Modified for the newest include/system.h
Patch Set 7:
15. Merge from version 0625
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Ifd7c10b81b5781ccd75bb2558dc236486976e8ed
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/272034
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
mutex_lock() is called from MEC1322_IRQ_ACPIEC0_IBF
interrupt context, causing deadlock and assertion
in __wait_evt().
In the interrupt context it now checks for mutex lock first.
If the mutex is already locked,, it will disable ACPI
interrupts and defer the memmap mutex lock.
Added LPC interrupt disable/enable functions as needed.
Increased deferred function count where needed.
BRANCH=None
BUG=chrome-os-partner:40820
TEST=Test for suspend-resume, cold, warm reboots and
other general stability.
Change-Id: I3dda0d4635a6b6281faf200c8c7b6fcba8877254
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/280418
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Tested-by: Divya Jyothi <divya.jyothi@intel.com>
Since the reset cause was not recorded correctly
recovery mode(Esc+Refresh+Power) was not working.
With this change power-on reset state and VCC1_RST# only state
are distinguinshed.
BUG=chrome-os-partner:41479
BRANCH=none
TEST=Esc+Refresh+Power boots to recovery screen
Refresh+Power reboots the system
Change-Id: I63eff488c970302e7afe8a677a57ad27d4d9918e
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: Freddy Paul <freddy.paul@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/280782
Reviewed-by: Shawn N <shawnn@chromium.org>
This unifies all the EC header files to use __CROS_EC_FILENAME_H
as the include guard. Well, except for test/ util/ and extra/
which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively.
BUG=chromium:496895
BRANCH=none
TEST=make buildall -j
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029
Reviewed-on: https://chromium-review.googlesource.com/278121
Reviewed-by: Randall Spangler <rspangler@chromium.org>
There is no need for the usb flag, remove it.
There is no need for the unprotect flag, remove it.
BRANCH=none
BUG=chrome-os-partner:22990
TEST=run flash_ec before and after
Change-Id: I201bad7f5be63a90bb8168e21baef2c6fa8d85b4
Signed-off-by: Myles Watson <mylesgw@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273904
Reviewed-by: Randall Spangler <rspangler@chromium.org>
This just makes the LEDs blink continually, because I have a
development board sitting on my desk and I like to see it doing
something.
You can still force the GPIOs on and off using the tool in
extra/usb_gpio/.
BUG=none
BRANCH=none
TEST=make buildall
Try it:
sudo make BOARD=discovery-stm32f072 flash
The LEDs blink.
Force them on and off with:
cd extra/usb_gpio
make
./usb_gpio write -1 0
./usb_gpio write 0 -1
./usb_gpio write 2 0
./usb_gpio write 4 2
To resume blinking, use
./usb_gpio write 0 0
Change-Id: Iadbe7436c02de5b6eae81885d95bad154ca3692c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274131
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Add functions and associated test to read/write a 32 bit register
BRANCH=smaug
TEST=Test on smaug with bm160 driver
BUG=chromium:39900
Change-Id: Ieff24b65f1eb8610874fe13c4a8fadf583a218cb
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277535
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
changes added to support flashrom are:
sysjump support to be able to copy the RO/RW image
and jump to it without causing AP to reboot while
its alreday ON.
LPC init should be reinitialized on sysjump
corrected gpio_set_flags_by_mask to make sure we
update the register only for GPIO_LOW condition and not
all else conditions.
BUG=chrome-os-partner:38103
TEST=commands : flashrom -p ec -w ec.bin
flashrom -p ec -r ec.bin
BRANCH=none
Change-Id: I23892f0378d756052030e73034c3acdd41477e34
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/272000
Reviewed-by: Shawn N <shawnn@chromium.org>
Move disabling the TX timer up to as soon as possible after
DMA transmit is complete to avoid potentially clocking another
bit, which could corrupt the end of the transaction.
BUG=none
BRANCH=smaug
TEST=load on glados and use a scope to verify the end of transmit
is clean.
Change-Id: If52ba2475eeb9752da0acc8efc957c1f472bc711
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277298
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Change pd_tx_done() to wait specifically for the DMA complete
event using task_wait_event_mask().
This fixes a potential bug where if we get another event, for
example a TCPM event, while waiting for transmit to complete
we restore the pending event after we are done.
BUG=none
BRANCH=smaug
TEST=run on glados and make a bunch of contracts with zinger.
Change-Id: Ie28d97eba3edcc7a98fe842e8b7eb6b9d7707047
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/277297
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Page Boundary.
If SPI Flash write is at an offset within the page and the length
is greater than remainder of the page, the Flash page gets
corrupted as addressing wraps to the beginning of page and
previously written data gets overwritten. This change splits SPI
Flash writes in such cases into two operations in different pages.
BUG=None
BRANCH=None
TEST=During Software Sync, Depthcharge sends Flash write chunks that
cross page boundary. With this change, the RW parition does not get
corrupted. This can be confirmed by executing a successful
"sysjump RW" after a Software Sync.
Change-Id: I46349eea0d8e927353de7cb55a61e9960291adb6
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/275760
Reviewed-by: Shawn N <shawnn@chromium.org>
The in_stream and out_stream interfaces were a first attempt
at providing an abstraction for multiple stream like devices
(usart, USB, I2C/LPC host interfaces...). But, by baking
the queue into the device it proved to be hard to use and
required additional resources (task or deferred hook) to handle
passing data from one stream to another.
Since then the queue policy and producer/consumer interfaces
have replaced the stream interfaces. This CL removes the old
stream interfaces and updates the only users (deleting the
test echo code from the discovery-stm32f072 board and updating
the mcdp28x0 driver to use the queue interfaces).
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic0d2abf81eafc4fb2e61172540151f2d0ba45caf
Reviewed-on: https://chromium-review.googlesource.com/276163
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
According to the datasheet, PIN should not be set in the CTRL register.
BUG=none
TEST=Verify with I2C analyzer that no error is observed.
BRANCH=none
Change-Id: Ifed58b413151b40ed951cb71b1164432fea28eca
Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/276672
Reviewed-by: Shawn N <shawnn@chromium.org>
Now that we've removed boards from ToT, also delete board-specific
code used only by the removed boards.
There are still more things to remove (unused charging chips, LED
drivers, COMx support). More CLs coming.
BUG=chromium:493866
BRANCH=none
TEST=make buildall -j
Change-Id: Ie6bdeaf96e61cadd77e3f6336c73b9b54ff4eabb
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/276524
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This adds a new task and endpoints to handle large opaque (to the
USB) chunks of data. The expected use case is that the USB
endpoint accepts bytes from the host and passes them blindly to
the blob-handling task. At some point, the blob-handling task may
wish to send bytes back to the host. What those bytes are and
what they mean is determined at higher levels of abstraction.
BUG=chrome-os-partner:40969
BRANCH=none
TEST=make buildall
This CL doesn't enable the blob-handler; it just makes it
available. The next CL will enable and test it.
Change-Id: I6eba8e8010466e71efe9c5e06848b9f403df835f
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/275131
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Ensure that we put a proper start bit if the transfer only contains a
read but has the start flag set.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=smaug
BUG=chrome-os-partner:40919
TEST=On Smaug (P6), at the Linux prompt, do
"cat /sys/class/power_supply/bq27742-0/current_now" and see a proper
value rather than an error.
Change-Id: I10cc9907476b3cfb006f2c1540688139366c9195
Reviewed-on: https://chromium-review.googlesource.com/275079
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Puthikorn Voravootivat <puthik@chromium.org>
Charger task is overflowing and causing crash.
Increased charger task stack size by 128 bytes.
Also increased console/hook by 128 bytes as these
are also close to its limit.
BRANCH=None
BUG=chrome-os-partner:40766
TEST=1.Program EC image.
2. Run various tests to verify charger stack doesn't
overflow.
Change-Id: I6e350584508fa3a47769982b1e0cf3e3aea9ded6
Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/274204
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
Allow timeout to be set at runtime by controller.
BUG=chrome-os-partner:40780
TEST=Manual on Glados. Verify PD I2C communication is functional.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I582e47c7bebfed7a639789c90064d86ffe1a5401
Reviewed-on: https://chromium-review.googlesource.com/274967
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Add TCPM on EC side and TCPC on PD side to allow PD
communication. Enable PD communication on port 0.
BUG=none
BRANCH=none
TEST=load on oak. plug in hoho on port 0, and make sure
we successfully negotiate a PD contract. (note: you have
to manually enable 5V VBUS right now)
Change-Id: I0ce7c016545bc56c5e10f66b49b73722187f12dc
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/271829
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Commit-Queue: Sheng-liang Song <ssl@chromium.org>
The USB spec mandates that all structs are little-endian over the
wire. Since we're a little-endian architecture (and the code
we're changing is intentionally chip-specific), we can just cast
the hardware buffer into the correct struct. This makes the code
easier to read and understand.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ib2d3b04f4db1a531cb3f5ada1a2e6ee82e8a23aa
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/274130
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Our USB buffers are just arrays of uint8_t in program RAM, so
let's treat them that way. The DMA descriptors are in normal RAM,
too.
BUG=chrome-os-partner:40693
BRANCH=none
TEST=make buildall
Change-Id: Ibafe1a557a328bbf8cf37ce113675fcd35bad376
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273918
Reviewed-by: Randall Spangler <rspangler@chromium.org>
- Don't re-send our slave address if we're not generating a start
condition.
- Handle repeated start vs new transaction properly in the Rx case.
BUG=chrome-os-partner:40677
BRANCH=none
TEST=Manual on glados. Verify 'battery' dumps correct info, and i2cscan
succeeds. Also verify that tcpc communication with PD transmits the expected
data.
Change-Id: I30315d2d82857d6031fda6d4e6a787a52ec01382
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273956
Reviewed-by: Alec Berg <alecaberg@chromium.org>
This moves the STM32-specific code out of the common header file
and into the chip directory where it belongs. Note that this
doesn't actually change the code for non-STM32 SoCs; that will
happen in a separate CL for clarity.
BUG=chrome-os-partner:40693
BRANCH=none
TEST=make buildall
Change-Id: Ifdf0086e86a1088fb011b9ac4d6c70ab8da47aec
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/273577
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add initial support for Oak PD MCU on rev1 boards.
This does not include USB PD communication.
BUG=none
BRANCH=none
TEST=build and load on oak and get console. test we
resond to host commands from EC using "pdcmd 0 0" on
EC console.
Change-Id: I92045cf0fd682279ada6c286f5399f0e258a6305
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/271828
i2c_xfer was previously implemented at the chip-level, but now we want
to add some global retry logic. Rename the chip-level i2c_xfer functions
to chip_i2c_xfer and add a new global wrapper function i2c_xfer.
BUG=chrome-os-partner:39613
TEST=Run "battery" from EC console on Cyan, verify that values + strings
are correctly printed.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: If37c85cc3cf94fd53feb6931553e10c30ad6cad6
Reviewed-on: https://chromium-review.googlesource.com/272939
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Add initial support for Oak rev1 board. This is just the
EC and includes battery charging but does not include
USB PD.
BUG=none
BRANCH=none
TEST=load on oak board and get console
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Change-Id: I626f3921025fbc39ba22b04eeb6dd1084cd70777
Reviewed-on: https://chromium-review.googlesource.com/261678
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Move parts of usb_pd_config.h that are not part of the phy layer
out of usb_pd_config.h and into board.h. This cleans up the
division between the TCPC and TCPM as only the TCPC needs to
use usb_pd_config.h.
Also cleans up the use of the CC detection voltage thresholds
by creating standard macros to use based on Rp strength for the
board.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270337
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Since stm32 and mec1322 now support open-ended i2c_xfer, we can move the
lm4 i2c_read_string implementation to common code and delete all
chip-specific versions.
BUG=chrome-os-partner:39613
TEST=Run "battery" from EC console on Cyan and Oak, verify that battery
info + strings are correctly printed.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I06369df64bb2eb747d163664b4c96eeacb4b1faa
Reviewed-on: https://chromium-review.googlesource.com/272938
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Modify i2c_xfer to support transfers where start and stop conditions are
not issued together.
BUG=chrome-os-partner:39613
TEST=Manual with subsequent commit. Verify that 'battery' shows proper
values + strings.
BRANCH=None
Change-Id: If98c9493902326203880645828061c45c9cfd8be
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/272995
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Previously the Producer and Consumer interfaces tracked the
Consumer and Producer respectively at the other end of the
queue that they interacted with. This was done to avoid
modifying the queue implementation, but resulted in a rougher
interface that required additional initialization steps and
prevented alternative configurations; many producers and one
consumer for example.
This commit uses the new queue policies to track this
information. The new direct policy behaves as the old producer
and consumers did. Now the producers and consumers are just
named references to the queue that they work on and a convenient
location for a notification callback when the queue is updated in
a way that is relevent to the producer or consumer.
All users of Producer and Consumer have been updated including the
stream adaptors which are in use by the echo test code and the
mcdp28x0 driver. Use of the stream adaptors has also been
simplified.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Manual testing of Ryu (P5) and discovery board echo task
Change-Id: I704be6378a31b4e20f5063295eff9943e4900409
Reviewed-on: https://chromium-review.googlesource.com/271792
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
