npcx GPIO code calls out to an LPC function, which isn't defined on
platforms without LPC support.
BUG=chromium:520207
TEST=`make buildall -j`
BRANCH=None
Change-Id: I80c0d08fea4a2621df9646926959fc48af52a15a
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293013
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
- PMIC init can be called from HOOK_INIT now that this happens after the
scheduler has started.
- There's no need to re-initialize the PMIC on sysjump
BUG=None
TEST=Verify glados boots to S0
BRANCH=None
Change-Id: I1839e1bd357759ae2800d812b27bf4e0cd7772b4
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/293012
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
If we have a lightbar, but no PD, then plugging the device in will
not trigger the battery-level pattern. This allows us to trigger
it from the charger task instead if we change AC status and don't
have a PD.
BRANCH=ToT
BUG=None
TEST=plug and unplug charger from device, make sure the lightbar
plays the right pattern
Change-Id: I8f37aaff2ddb9d936e13489cb404caee822418a1
Signed-off-by: Eric Caruso <ejcaruso@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292943
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The glados_pd test build runs out of RAM, so disable it for now.
BUG=chrome-os-partner:43948
TEST=emerge-glados chromeos-ec
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I519917a36d193931e993cf16487ac33c81ceb163
Reviewed-on: https://chromium-review.googlesource.com/292935
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Fixed bug during polling port 0x204 by BIOS.
We should set processing flag before reading command byte in ISR to prevent
EC_LPC_STATUS_FROM_HOST and EC_LPC_STATUS_PROCESSING bits are both low.
Modified drivers:
1. gpio.c: Add LRESET ISR.
2. lpc.c: Fixed bug during polling port 0x204 by BIOS.
3. flash_ec: Reset ec before flashing ec
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I8e557f2e2be41a7a9d40c03c775313b12668f283
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/291210
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Randall Spangler <rspangler@chromium.org>
Tested-by: Randall Spangler <rspangler@chromium.org>
Symbolic link kunimitsu_pd to glados_pd folder. Disable PD test
build until issue is fixed.
BUG=chrome-os-partner:43142
TEST=emerge-kunimitsu chromeos-ec and check EC and PD binaries
Change-Id: Ic0f1d73246333d8ec7752bb4c42b1c0ac220b5c3
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/292841
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
`tests` build was previously disabled for glados due to errors building
power/skylake.c. Properly undef the chipset config to make `tests` work
for all skylake platforms.
BUG=None
TEST=`make BOARD=glados tests`
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I7a730cdd5e30a932ff0cd1f3beef77873b9e0630
Reviewed-on: https://chromium-review.googlesource.com/292910
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The public sources look for board configurations in directories
named board/$BOARD/
Sometimes it's necessary to keep sensitive projects out of the
public view for a bit.
This CL allows board configurations to also appear in directories
named private*/board/$BOARD/
BUG=none
BRANCH=none
TEST=manual
First, ebuilds and "make buildall" seem to work just as before.
Second, I copied 24 of the existing boards (those without
board-specific #ifdefs in the code) into a private*/board/
directory, renamed them to something unique, and ran "make
buildall" again.
Both public and private boards compiled and passed their tests.
Change-Id: I977c23cb8e73e40677c8f329abca8bbc51fd53df
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292428
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Use new board-level hibernate GPIO state function to turn off LEDs in
hibernate.
BUG=chrome-os-partner:43807
TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console,
verify that LED remains off. Press power button, verify that board wakes.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Id695df9b5e75514f8f807a894b63f71676b66f92
Reviewed-on: https://chromium-review.googlesource.com/292317
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add a new board-level function board_get_gpio_hibernate_state which can
optionally be defined to set the desired state of a GPIO during
hibernate.
BUG=chrome-os-partner:43807
TEST=Manual on Glados with subsequent commit. Run 'hibernate' on console,
verify that LED remains off. Press power button, verify that board wakes.
BRANCH=None
Change-Id: Ica11554e231e88773c3e139fea4622377ebe1e42
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292471
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
One more register constaint needed to be added to the cortex-m0 atomic
inline assembly. Vincent fixed all the others. The requirement for
ARMv6-m includes that the target load register be one of the low
registers as well.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ie44e824cafcc9b862ade664e3016cc34886cdf6e
Reviewed-on: https://chromium-review.googlesource.com/292435
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
In case of 'apshutdown', during transition to S5 state,
GPIO_PCH_SLP_S4_L signal was not getting deasserted but
required rail went away (GPIO_PCH_SYS_PWROK). So it was
going on a loop S5 -> S3 and S3 -> S5.
In strago GPIO_PCH_SYS_PWROK is the PMIC_EN GPIO and hence
conditinally setting it based on CONFIG_PMIC
BUG=none
TEST=apshutdown on strago
BRANCH=none
Change-Id: I9c581a3dfcb9cc84a22b41505e7df496d72d5f4c
Signed-off-by: Kumar, Gomathi <gomathi.kumar@intel.com>
Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/292024
Reviewed-by: Shawn N <shawnn@chromium.org>
symptom:
Unexpected watchdog reset console message if watchdog is enabled.
The IPC value of pre-watchdog warning is in idle task.
duplicate:
set time_us = 0xff000000 when timer init, watchdog will reset after
about 18 seconds.
also fix:
reload the watchdog counter while flash write.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=1. enable watchdog.
2. no unexpected watchdog reset.
3. ectool "flashwrite 0x20000 ec.RW.bin" no watchdog reset.
Change-Id: Ife10c2ead9c76462a865e694543e862b387d3b49
Reviewed-on: https://chromium-review.googlesource.com/292071
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
The new FPGA version adds a lot of few features, while temporarily
cutting off some existing capabilities like clocking configuration
(hardwared clocks used instead), pinmux assignment for SPS interface
(hardwared connections used), etc.
This patch removes some now unused code, modifies some configuration
items and adds TODO_FGPA comment blocks highlighting code which needs
to be reviews next time FPGA version changes).
The new register definitions file is derived from hardware
description.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with these changes in place the B1 board boots to the console
prompt.
Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291855
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
This code kicks in when the target is compiled with
CONFIG_POLLING_UART defined.
This ensures that each message sent to the console is drained
completely before the code proceeds, which helps debugging early
bringup issues.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with this code enabled was able to debug cr50 bringup on the new
core version.
Change-Id: Iab42370d64d17ecc5210bd4db1f2c5f19b40bce8
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291853
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
CONFIG_USB is a better indicator that USB related code needs to be
included.
BRANCH=none
BUG=none
TEST=none - this patch helped compartmentnalize the code when
debugging bringup on a new platform.
Change-Id: I12ef77325591853d73e2e09f7c491954e272bde9
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291854
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
The code in core/cortex-m/init.S limits the number of installed
vectors to CONFIG_IRQ_COUNT. But the DECLARE_IRQ macro installing
interrupt servicing routines does not care about this limitation. This
results in corrupted interrupt configuration, which is hard to debug.
This patch makes sure that there is a compilation error in case
DECLARE_IRQ is passed interrupt number which out of bounds.
A similar change needs to be introduced for cortex-m0.
BRANCH=none
BUG=chromium:518898
TEST=tried building cr50 with one of interrupt numbers exceeding
CONFIG_IRQ_COUNT, observed a compilation error.
Change-Id: Ie7bc623da6bf7371579b2242064f81a83053df17
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291843
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Enabled lid angle calculation. Clamshell/Tablet mode is decided by lid angle.
Accelerometers are set to be active in S3 also.
Trackpad is enabled/disabled by GPIO TP_INT_DISABLE.
Keyboard scan and trackpad are enabled in clamshell mode and disabled in
tablet mode.
Removed enable_keyboard() since keyboard is enabled in clamshell S0 and
S3.
BUG=chrome-os-partner:41353
TEST=Verify in clamshell mode, system can be waken up from S3 by keyboard/trackpad;
And not tablet mode.
BRANCH=None
Change-Id: Ic5fb5a562e8426288eae2fb9815a213fe5033955
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/287341
Reviewed-by: Shawn N <shawnn@chromium.org>
This gives a test case for the USART driver on an STM32L. Eventually
this will be a good place to test that even in a downclocked configuration
the STM32L USART driver can handle 115200 without dropping characters.
This also gives a convenient build test for the STM32L version of the
USART driver.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Cross connect a Discovery and a Discovery-stm32f072
Change-Id: Ifb8dfc1179e8a0be84390d36e0bc3ff15f4f4685
Reviewed-on: https://chromium-review.googlesource.com/288979
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
The USART peripheral in the L and F families is different enough to need
different receive drivers. In particular, the L family USART perihperal
has no way of disabling the overflow error bit. So for that family we
check and clear the bit, and keep a count of overflows.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Iea26c242d5177afd552a3bd4d6ab1a9c7a65f90e
Reviewed-on: https://chromium-review.googlesource.com/288978
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Implement LED control for glados for both red and green LED.
BUG=chrome-os-partner:40848
BRANCH=none
TEST=Manually tested on glados with following commands:
ectool led battery red
ectool led battery green
ectool led battery off
Change-Id: I1b4f8c8c8f26779a11185ea8bbc6536d1d7f97b1
Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/289439
Reviewed-by: Shawn N <shawnn@chromium.org>
Early hardware bringup often is complicated by exceptions happening in
the code all over the place. Using interrupt based console output to
trace startup progress is inefficient - a lot of text gets buffered
and never shows up on the console.
The new config option enables the mode where the console output is
supposed to be happening in polling mode, the character transmit
function not exiting until the entire character is transmitted.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=with the new config enabled (and the appropriate changes to
chip/g/uart.c) was able to debug bringup on the new version.
Change-Id: I85fd2f3990ac1d31097d58bd6a7fa658b2b5146e
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/291852
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Now that v3 support is in the cros_ec kernel driver and depthcharge,
deprecate support for the old v2 protocol. At some point in the future,
support for the v2 protocol will dropped entirely.
Boards that require support for the V2 protocol should enable the
following config option.
#define CONFIG_SPI_PROTOCOL_V2
BUG=chrome-os-partner:20533
BRANCH=None
TEST=make -j buildall tests
TEST=Flash jerry, AP & EC boot successful.
TEST=`ectool protoinfo` shows only version 3 supported on jerry.
TEST=Flashrom still works on jerry.
Change-Id: I72d3aee00879314b936cc0b1002c9883550b1f1a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291411
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
The motion sense task was checking to see that every single motion
sensor was ready (active, initialized, and reading), before performing
the lid angle calculations. This amount of checking is unnecessary.
This commit reduces the condition to only check if the sensors required
for lid angle calculation are ready.
BUG=chrome-os-partner:36132
BRANCH=None
TEST=Build and flash on samus. Verify that the lid still works.
TEST=make -j buildall tests
Change-Id: Ibaa5cc8358cdcc6023a50aed247fce2e599fef58
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/291301
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
When flash_set_protect() is called pretend to activate "ALL" protection,
and report it active if asked. This persists through sysjump and cleared
on reboot/reset.
BUG=chrome-os-partner:43323
TEST=Cyan. "flashinfo" should show "all_now", after "flashwp now" called,
but only if WP is active and RO protection is activated earlier
BRANCH=strago-7287.B
Change-Id: I042e5311d79b7ef8e5bc3917662df1edab0e65cb
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/290813
Reviewed-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
No need to use EC in-direct fast read for verifying, just a pointer.
symptom:
ectool erase 128KB RW image will show "Timeout waiting for EC response",
but the erase is success.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=ectool erase RW image will show the correct message.
Change-Id: Ie07d087ec004edc730bd084dd2e9b541f84adc2b
Reviewed-on: https://chromium-review.googlesource.com/290525
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Let keyboard_raw_task_start() function enable key scan interrupt.
symptom:
When any key is pressed while powering on the system.
Console message "KB init state" will show no key pressed.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=console message "KB init state" normal
Change-Id: I49fcbc4c6c40d0c7e551631466a4ef4c2215a892
Reviewed-on: https://chromium-review.googlesource.com/290508
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Currently, when a host command is received which would overlap with an
ongoing host command, we ignore it silently. This commit simply logs a
line to the EC console stating that we are ignoring the overlapping host
command.
BRANCH=None
BUG=chrome-os-partner:23806
TEST=make -j buildall tests
TEST=Build, flash, and boot samus. Using ectool, read 64K from flash
while also querying the current EC switch positions. Observe the log
message being printed to the EC console.
Change-Id: Ic0d249ccec2efb9600bcf8567392add1ee6295d9
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/290545
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Move common USB charger code out of board directory including
setting VBUS supplier when VBUS changes, and initializing BC1.2
supplier types on init.
This also enables re-enabling of Pericom BC1.2 detection interrupts
when VBUS is changed on all boards that use USB_CHG task.
BUG=chrome-os-partner:42292
BRANCH=none
TEST=make -j buildall. Tested on glados and samus by plugging in
a few different chargers and making sure we charge.
Change-Id: Ib102fbf7a6aace998e6fcb6d35f3c97e5f03f5c2
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290453
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
There are 3 methods to power on the system:
1) Pulling PWRKEY low (User presses PWRKEY)
2) Setting BBWAKEUP high
3) Valid charger plug-in
We should ensure that BBWAKEUP should be high when release PWRKEY.
Due to the RTC driver of coreboot will move to ramstage, and the
setup timing of BBWAKEUP will be postpone. In order to ensure PMIC
keeping the power until coreboot pull BBWAKEUP up, it needs to
increase the PMIC power key press time to avoid PMIC turn the
power off. This change is related to:
https://chromium-review.googlesource.com/#/c/257389/
BRANCH=none
BUG=none
TEST=manual
Update coreboot with above patch, press power key and system
should power on normally.
Change-Id: I7fabc49e0b3956885cb83a0b40c31c60080d0cbc
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290538
Reviewed-by: Rong Chang <rongchang@chromium.org>
Oak rev3 has 2 dual-color LEDs to indicate the AP power & battery
status. The behavior has been redefined and distinguish from rev2
by board version API.
BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
make -j BOARD=oak
both cases should be built successfully.
And Check the PWR & BAT LED.
Change-Id: Ic60d6f91002c3534e4c12a27e5c89bc2d0a1ecfd
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290061
Reviewed-by: Rong Chang <rongchang@chromium.org>
The AP warm reset pin is changed from rev3 of oak board.
PB3 is stuffed before rev3 and connected to PMIC RESET pin to
reset the AP. For rev3, the AP reset mechanism is changed:
PC3 connects to PMIC SYSRSTB, pull PC3 to low, to reset AP.
BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
make -j BOARD=oak
both cases should be built successfully and run "apreset" command.
AP should be reset normally.
Change-Id: I979e93acf755509f8cb7a12dd77eb7c9e7a98ccc
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/289476
Reviewed-by: Rong Chang <rongchang@chromium.org>
In S3, the EC isn't expecting AP host commands, so it's safe to enable
sleep
BRANCH=none
BUG=none
TEST=Check sleep mask in S0 and S3.
Also check sleep mask after sysjump with AP on and with AP off.
Change-Id: I9dcfe996e8e92e6703d71bbe966cd2447c6b14fe
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/290002
Reviewed-by: Rong Chang <rongchang@chromium.org>
Fix buffer overrun bug when retrieving a PD message. Bug was
introduced in CL:289005
BUG=chrome-os-partner:43482
BRANCH=none
TEST=tested on samus. plug and unplug zinger on both ports and
make sure PD MCU never crashes.
Change-Id: I9d2dec0cab07f389fd935d616ab7443da412d4bd
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290417
Reviewed-by: Shawn N <shawnn@chromium.org>
Configure boards whose chipset cannot be a USB UFP to disconnect
USB lanes when the data role is UFP.
BUG=none
BRANCH=strago
TEST=make -j buildall. tested on glados by adding ccprintf to
usb_charger_set_switches(). verified when we are DFP, USB 2
switches are connected and when we are UFP, they are disconnected.
Change-Id: Ic8c817a0cc21b56ee67239e8cc81d5cbbda8d4de
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290422
Reviewed-by: Shawn N <shawnn@chromium.org>
Modify the GPIO seeting according to the Oak rev3 schematic.
BRANCH=none
BUG=none
TEST=manual
1. define CONFIG_BOARD_OAK_REV_2 in board.h
make -j BOARD=oak
2. define CONFIG_BOARD_OAK_REV_3 in board.h
make -j BOARD=oak
both cases should be built successfully.
Change-Id: I0336624a5a2d356a4c2eb9ffb812ebffb4f5f7c3
Signed-off-by: Ben Lok <ben.lok@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/289475
Reviewed-by: Rong Chang <rongchang@chromium.org>
The flash_ec script is called by the lab infrastructure to flash
the EC firmware of DUT. To prevent the EC flashing tool hanged
forever (may be caused by some bugs), set a 10-minute timeout to
force it to be killed.
BRANCH=none
BUG=chromium:514810
TEST=Patched the change to servo v3. Triggered flash_ec to flash EC
on Jerry. Set the timeout to a small value to force to kill itself.
test2:
./flash_ec --board=hadoken # or samus, anything using openocd
remove the USB cable half way through (openocd hangs)
ps au | grep openocd
Change-Id: I39ad8659b41764fd0dba30a86eca301fbbc5243f
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/289247
Commit-Queue: Myles Watson <mylesgw@chromium.org>
system_get_chip_revision() would return a string which lacked the
terminating null. Increase the string length and enforce termination.
BUG=chromium:511405
BRANCH=none
TEST=version; should show chip revision without garbage chars at end
Change-Id: Icb9e36c5bfdf7de7400e5316934ccf28b4b57898
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/290392
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
Tested-by: Mulin Chao <mlchao@nuvoton.com>
BUG=chrome-os-partner:42156
TEST=Manual on Glados. Boot to S0, run "temps". Verify that temperatures
start around 28C and begin to increase after system is powered-on for a long
duration.
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3bebba4864c8e5b5b23e78947522e58311298bbd
Reviewed-on: https://chromium-review.googlesource.com/289936
Reviewed-by: Alec Berg <alecaberg@chromium.org>
